Compiler Engineer

About ConfigAI

ConfigAI is building the compiler that turns ML models into FPGA hardware automatically. We are based in Saarbrucken, backed by the Max Planck Institute for Informatics and Google for Startups, and working on one of the hardest problems at the intersection of machine learning and silicon design.

About the Role

We are looking for a Compiler Engineer to work on the core pipeline that maps ML computation graphs to FPGA primitives. You will work directly on graph-level IR transformations, operator scheduling and hardware code generation. This is a 15 hrs/week, on-site role in Saarbrucken, open to students and professionals (m/w/d).

Key Responsibilities

• · Design and implement IR transformations that map high-level ML ops to hardware-friendly primitives.
• · Build and maintain the operator scheduling and placement passes in the compiler pipeline.
• · Contribute to the code generation backend that emits Verilog/VHDL from the compiler IR.
• · Collaborate with ML and HDL engineers to ensure correctness and performance of compiled hardware.
• · Write unit and integration tests for new compiler passes and regression coverage.
• · Profile and optimise compile-time performance for large model graphs.

Required Skills and Experience

• · Strong fundamentals in compiler design: IR, passes, transformations and code generation.
• · Proficiency in Python or C++ (our compiler pipeline uses both).
• · Understanding of ML computation graphs and common operator patterns (conv, matmul, attention).
• · Experience with MLIR, LLVM or a similar compiler framework is a strong plus.
• · Comfortable working in a fast-moving research-to-product environment.

Preferred Skills — Nice to Have

• · Familiarity with FPGA architecture: LUTs, DSPs, BRAMs and routing constraints.
• · Experience with hardware description languages (Verilog or VHDL).
• · Background in quantisation and operator fusion techniques for inference.
• · Knowledge of HLS toolchains such as Xilinx Vitis HLS.

Why Join Us

• · Work on a genuinely hard technical problem at the intersection of ML and hardware.
• · Small team: your contributions will have direct, visible impact on the product.
• · Research environment: direct access to expertise at the Max Planck Institute for Informatics.
• · Flexible 15 hrs/week commitment: ideal for students or researchers pursuing parallel work.
• · Claude Max (20x) provided — full AI tooling for your day-to-day work.